Digital Signal Processing ELE8059 Q1. Consider a continuous-time system in which the relationship between input (x) and output (y) is: ( ) ( ) 0.8 1 2a dy dx y t a x dt dt + = + , where time is denoted by t and a is a non-negative integer constant. (a) For which choices for a is this a linear system Explain your answer (you can use maths, but a full formal proof of linearity is not required). [6 Marks] (b) Specify the transfer function and the zeros and poles of the system for the case a = 1. [6 Marks] (c) For a = 1, is the system stable Explain your answer. [4 marks] (d) Again taking a = 1, derive a closed-form expression of the output signal, as a function of time, when the input signal is a pulse of width T, as plotted in Figure Q1. Figure Q1. [9 Marks] Digital Signal Processing ELE8059 Q2. A digital infinite impulse response (IIR) high-pass filter is required. The digital filter is to be designed to operate at a sample rate of 12 kHz with a cut-off frequency at 3 kHz. One requirement of the filter is that its amplitude response should have no ripples in the passband. It is decided that the digital filter design is to be based on the following low-pass prototype filter transfer function: 3 2 1 ( ) 2 2 1 H s s s s = + + + (a) Explain why the above transfer function is a suitable prototype low- pass filter choice in this case. [5 Marks] (b) Use the bilinear transform to derive, from the above prototype transfer function, an IIR high-pass that has the correct cut-off frequency. Show that the resulting digital filter transfer function can be written as ( ) 31 2 1 ( ) 1 g z H z az = + , And specify the values of the constants and g a . [12 Marks] (c) Draw a signal diagram of a “parallel structure” realisation of the digital filter, featuring a biquad section in parallel with a first-order section. Specify all coefficients used in the realisation. [8 Marks]
Digital Signal Processing ELE8059 Q3. A signal containing two frequency components (1812 Hz and 2352 Hz) of equal amplitude is sampled with a digital processor. The sampling frequency (fs) of the processor can be set to any integer multiple of 100 Hz, up to 10000 Hz. The signal block length (N) can be set to any integer value ranging from 200 to 2000 samples. The default settings of the processor are fs = 4800 Hz and N = 200 samples. (a) The processor is used to take the Discrete Fourier Transform (DFT) of an N-sample block of the signal, using the default settings. Sketch the resulting amplitude response, using bin number on the horizontal axis, and covering a frequency range from 0 Hz to 2500 Hz. [6 Marks] (b) Describe the main non-ideality in the amplitude spectrum. Explain how it can be eliminated, keeping any increase in processing and memory requirements as low as possible. [8 Marks] (c) An alternative sampling strategy is considered, using bandpass sampling. What is the lowest sampling frequency available on the processor that can be used as such for the given input signal [11 Marks] Digital Signal Processing ELE8059 Q4. As indicated in Figure Q4, a digital signal source y(n) consists of a periodic signal x(n) and additive white noise v(n) of variance 2 1 6v = . One period of the periodic signal x(n) is given by { 1, 0, 0, -1, 0 0 } . Figure Q4. (a) Construct the 6 6 autocorrelation matrix of the additive white noise signal v(n). Specify the values of the matrix elements. [5 Marks] (b) Derive the 6 6 autocorrelation matrix of the signal y(n). Specify the values of the matrix elements. [9 Marks] (c) Taking the signal y(n) as an input, it is desired to determine a 6-tap FIR filter which gives a triangular output signal t(n), with one period given by { -3, -1, 1, 3, 1, -1 } . Specify the coefficients of the optimal 6-tap FIR filter. [11 Marks] END OF EXAMINATION ( )x n ( )y n ( )v n